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1

Two-Run RAM March Testing with Address Decimation

Mrozek, Ireneusz, Yarmolik, Vyacheslav

Journal:

Journal of Circuits System and Computers

Year:

2017

Language:

english

File:

PDF, 218 KB

english, 2017

2

Transparent random access memory testing for pattern sensitive faults

M. G. Karpovsky, V. N. Yarmolik

Journal:

Journal of Electronic Testing

Year:

1996

Language:

english

File:

PDF, 1.20 MB

english, 1996

3

Digital methods and devices for analyzing and forming vibration processes

A. E. Leusenko, A. A. Petrovskii, V. N. Yarmolik

Journal:

Measurement Techniques

Year:

1980

Language:

english

File:

PDF, 390 KB

english, 1980

4

Zero aliasing ROM BIST

O. Kebichi, V. N. Yarmolik, M. Nicolaidis

Journal:

Journal of Electronic Testing

Year:

1994

Language:

english

File:

PDF, 883 KB

english, 1994

5

Influence of the phase composition of the feeder current upon calculations of deuterium rectification

Journal:

Year:

1981

Language:

english

File:

PDF, 189 KB

english, 1981

6

The repeated nondestructive march tests with variable address sequences

V. N. Yarmolik, S. V. Yarmolik

Journal:

Automation and Remote Control

Year:

2007

Language:

english

File:

PDF, 167 KB

english, 2007

7

Detecting multiple errors in RAM by Self-Adjusting output data compression

A. A. Ivaniuk, S. B. Musin, V. N. Yarmolik

Journal:

Russian Microelectronics

Year:

2007

Language:

english

File:

PDF, 195 KB

english, 2007

8

Generation of address sequences for effective random access memory testing

Journal:

Automatic Control and Computer Sciences

Year:

2007

Language:

english

File:

PDF, 165 KB

english, 2007

9

Injection of functional faults in VHDL-description of digital devices

A. A. Ivanyuk, V. N. Yarmolik

Journal:

Automatic Control and Computer Sciences

Year:

2007

Language:

english

File:

PDF, 182 KB

english, 2007

10

A new approach to the design of built-in internal memory self-testing devices

A. A. Ivanyuk, V. N. Yarmolik

Journal:

Automatic Control and Computer Sciences

Year:

2008

Language:

english

File:

PDF, 161 KB

english, 2008

11

Determination of the optimal initial states for multiple-run RAM testing

S. V. Yarmolik, A. N. Kurbatskii, V. N. Yarmolik

Journal:

Automatic Control and Computer Sciences

Year:

2008

Language:

english

File:

PDF, 126 KB

english, 2008

12

Nondestructive RAM testing based on multiple signature comparison

S. V. Yarmolik, V. N. Yarmolik

Journal:

Automatic Control and Computer Sciences

Year:

2009

Language:

english

File:

PDF, 147 KB

english, 2009

13

The synthesis of probability tests with a small number of kits

S. V. Yarmolik, V. N. Yarmolik

Journal:

Automatic Control and Computer Sciences

Year:

2011

Language:

english

File:

PDF, 237 KB

english, 2011

14

Generalized adaptive signature analysis

S. V. Yarmolik, V. N. Yarmolik

Journal:

Automatic Control and Computer Sciences

Year:

2010

Language:

english

File:

PDF, 195 KB

english, 2010

15

A High-Speed Pseudorandom Test Pattern Generator

I. A. Murashko, V. N. Yarmolik

Journal:

Russian Microelectronics

Year:

2001

Language:

english

File:

PDF, 56 KB

english, 2001

16

Iterative Antirandom Testing

Ireneusz Mrozek, Vyacheslav N. Yarmolik

Journal:

Journal of Electronic Testing

Year:

2012

Language:

english

File:

PDF, 369 KB

english, 2012

17

Efficient online and offline testing of embedded DRAMs

Hellebrand, S., Wunderlich, H.-J., Ivaniuk, A.A., Klimets, Y.V., Yarmolik, V.N.

Journal:

IEEE Transactions on Computers

Year:

2002

Language:

english

File:

PDF, 808 KB

english, 2002

18

Controlled random tests

S. V. Yarmolik, V. N. Yarmolik

Journal:

Automation and Remote Control

Year:

2012

Language:

english

File:

PDF, 204 KB

english, 2012

19

[Telecommun. Res. Inst 14th International Conference on Microwaves, Radar and Wireless Communications. MIKON-2002 - Gdansk, Poland (20-22 May 2002)] 14th International Conference on Microwaves, Radar and Wireless Communications. MIKON - 2002. Conference Proceedings (IEEE Cat.No.02EX562) - Radar target detection - identification by multifrequency and fluctuating portraits in multifrequency radiation radars

Shaliapin, S.V., Yarmolik, S.N.

Year:

2002

Language:

english

File:

PDF, 173 KB

english, 2002

20

Generating modified Sobol sequences for multiple run march memory tests

Yarmolik, V. N., Yarmolik, S. V.

Journal:

Automatic Control and Computer Sciences

Year:

2013

Language:

english

File:

PDF, 210 KB

english, 2013

21

[IEEE 6th International Conference on Computer Information Systems and Industrial Management Applications (CISIM'07) - Elk, Poland (2007.06.28-2007.06.30)] 6th International Conference on Computer Information Systems and Industrial Management Applications (CISIM'07) - Obfuscation as Intellectual Rights Protection in VHDL Language

Brzozowski, Maciej, Yarmolik, Vyacheslav N.

Year:

2007

Language:

english

File:

PDF, 177 KB

english, 2007

22

[IEEE Comput. Soc. Press 14th VLSI Test Symposium - Princeton, NJ, USA (28 April-1 May 1996)] Proceedings of 14th VLSI Test Symposium - March LR: a test for realistic linked faults

van de Goor, A.J., Gaydadjiev, G.N., Mikitjuk, V.G., Yarmolik, V.N.

Year:

1996

Language:

english

File:

PDF, 828 KB

english, 1996

23

[IEEE IEEE International Workshop on Memory Technology, Design and Testing, - Singapore (August 13-14, 1996)] IEEE International Workshop on Memory Technology, Design and Testing, - RAM diagnostic tests

Yarmolik, V.N., Klimets, Yu.V., van de Goor, A.J., Demidenko, S.N.

Year:

1996

Language:

english

File:

PDF, 252 KB

english, 1996

24

[IEEE Comput. Soc. Press IEEE International Workshop on Memory Technology, Design, and Test - San Jose, CA, USA (8-9 Aug. 1994)] Proceedings of IEEE International Workshop on Memory Technology, Design, and Test - Transparent memory BIST

Karpovsky, M.G., Yarmolik, V.N.

Year:

1994

Language:

english

File:

PDF, 515 KB

english, 1994

25

[IEEE Comput. Soc 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Austin, TX, USA (2-4 Nov. 1998)] Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223) - BIST module for mixed-signal circuits

Demidenko, S., Piuri, V., Yarmolik, V., Shmidman, A.

Year:

1998

Language:

english

File:

PDF, 43 KB

english, 1998

26

[IEEE Comput. Soc. Press the European Design and Test Conference. ED&TC 1995 - Paris, France (6-9 March 1995)] Proceedings the European Design and Test Conference. ED&TC 1995 - Pseudo-exhaustive word-oriented DRAM testing

Karpovsky, M.G., van de Goor, A.J., Yarmolik, V.N.

Year:

1995

Language:

english

File:

PDF, 552 KB

english, 1995

27

[Int. Test Conference International Test Conference - Washington, DC, USA (2-6 Oct. 1994)] Proceedings., International Test Conference - Aliasing-free signature analysis for RAM BIST

Yarmolik, V.N., Nicolaidis, M., Kebichi, O.

Year:

1994

Language:

english

File:

PDF, 1.04 MB

english, 1994

28

[IEEE 2006 IEEE Design and Diagnostics of Electronic Circuits and systems - Prague, Czech Republic (April 18-21, 2006)] 2006 IEEE Design and Diagnostics of Electronic Circuits and systems - Optimal Memory Address Seeds for Pattern Sensitive Faults Detection

Yarmolik, S.V., Sokol, B.

Year:

2006

Language:

english

File:

PDF, 92 KB

english, 2006

29

[IEEE 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems - Ciechocinek, Poland (2007.06.21-2007.06.23)] 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems - Multi Background Memory Testing

Yarmolik, S. V., Mrozek, I.

Year:

2007

Language:

english

File:

PDF, 244 KB

english, 2007

30

[IEEE Comput. Soc. Press European Design and Test Conference. ED & TC 97 - Paris, France (17-20 March 1997)] Proceedings European Design and Test Conference. ED & TC 97 - March LA: a test for linked memory faults

van de Goor, A.J., Gaydadjiev, G.N., Yarmolik, V.N., Mikitjuk, V.G.

Year:

1997

Language:

english

File:

PDF, 109 KB

english, 1997

31

[IEEE Comput. Soc. Press European Design and Test Conference - Paris, France (11-14 March 1996)] Proceedings ED&TC European Design and Test Conference - RAM testing algorithms for detection multiple linked faults

Mikitjuk, V.G., Yarmolik, V.N., van de Goor, A.J.

Year:

1996

Language:

english

File:

PDF, 482 KB

english, 1996

32

[IEEE 6th International Conference on Computer Information Systems and Industrial Management Applications (CISIM'07) - Elk, Poland (2007.06.28-2007.06.30)] 6th International Conference on Computer Information Systems and Industrial Management Applications (CISIM'07) - Address Sequences Generation for Multiple Run Memory Testing

Yarmolik, S.V., Mrozek, I., Sokol, B.

Year:

2007

Language:

english

File:

PDF, 481 KB

english, 2007

33

[Int. Test Conference 1995 IEEE International Test Conference (ITC) - Washington, DC, USA (21-25 Oct. 1995)] Proceedings of 1995 IEEE International Test Conference (ITC) - Exact aliasing computation for RAM BIST

Kebichi, O., Nicolaidis, M., Yarmolik, V.N.

Year:

1995

Language:

english

File:

PDF, 1.04 MB

english, 1995

34

[IEEE Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06) - Kuala Lumpur, Malaysia (2006.01.17-2006.01.19)] Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06) - Address sequences for march tests to detect pattern sensitive faults

Sokol, B., Yarmolik, S.V.

Year:

2006

Language:

english

File:

PDF, 174 KB

english, 2006

35

[IEEE 2008 11th International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS) - Bratislava, Slovakia (2008.04.16-2008.04.18)] 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems - Optimal Backgrounds Selection for Multi Run Memory Testing

Mrozek, Ireneusz, Yarmolik, Vyacheslav

Year:

2008

Language:

english

File:

PDF, 1.59 MB

english, 2008

36

[IEEE Comput. Soc 17th IEEE VLSI Test Symposium - Dana Point, CA, USA (25-29 April 1999)] Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146) - Error detecting refreshment for embedded DRAMs

Hellebrand, S., Wunderlich, H.-J., Ivaniuk, A., Klimets, Y., Yarmolik, V.N.

Year:

1999

Language:

english

File:

PDF, 58 KB

english, 1999

37

[IEEE Comput. Soc. Press Records of the 1993 IEEE International Workshop on Memory Testing - San Jose, CA, USA (9-10 Aug. 1993)] Records of the 1993 IEEE International Workshop on Memory Testing - Exact aliasing computation and/or aliasing free design for RAM BIST

Yarmolik, V.N., Nicolaidis, M.

Year:

1993

Language:

english

File:

PDF, 626 KB

english, 1993

38

[IEEE Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06) - Kuala Lumpur, Malaysia (2006.01.17-2006.01.19)] Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06) - Designing cryptographic key generators with low power consumption

Puczko, M., Yarmolik, V.N.

Year:

2006

Language:

english

File:

PDF, 177 KB

english, 2006

39

[IEEE 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems - Ciechocinek, Poland (2007.06.21-2007.06.23)] 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems - Self-Adjusting Output Data Compression for RAM with Word Error Detection and Correction

Musin, S.B., Ivaniuk, A.A., Yarmolik, V.N.

Year:

2007

Language:

english

File:

PDF, 179 KB

english, 2007

40

[IEEE 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems - Krakow, Poland (2007.04.11-2007.04.13)] 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems - Multiple Errors Detection Technique for RAM

Musin, S.B., Ivaniuk, A.A., Yarmolik, V.N.

Year:

2007

Language:

english

File:

PDF, 279 KB

english, 2007

41

[IEEE 2008 7th Computer Information Systems and Industrial Management Applications (CISIM) - Ostrava, Czech Republic (2008.06.26-2008.06.28)] 2008 7th Computer Information Systems and Industrial Management Applications - Multi Background Memory Testing

Mrozek, I., Yarmolik, V.N., Buslowska, E.

Year:

2008

Language:

english

File:

PDF, 200 KB

english, 2008

42

[IEEE International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006. - Gdynia, Poland (22-24 June 2006)] Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006. - Modified Gray And Counter Sequences For Memory Test Address Generation

Yarmolik, S.V., Yarmolik, V.N.

Year:

2006

Language:

english

File:

PDF, 191 KB

english, 2006

43

[Int. Test Conference International Test Conference - Washington, DC, USA (2-6 Oct. 1994)] Proceedings., International Test Conference - Transparent memory testing for pattern sensitive faults

Karpovsky, M.G., Yarmolik, V.N.

Year:

1994

Language:

english

File:

PDF, 884 KB

english, 1994

44

[IEEE Comput. Soc Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings - Munich, Germany (9-12 March 1999)] Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078) - Symmetric transparent BIST for RAMs

Yarmolik, V.N., Hellebrand, S.

Year:

1999

Language:

english

File:

PDF, 58 KB

english, 1999

45

[IEEE 2013 11th East-West Design and Test Symposium (EWDTS) - Rostov-on-Don, Russia (2013.09.27-2013.09.30)] East-West Design & Test Symposium (EWDTS 2013) - Analyses of two run march tests with address decimation for BIST procedure

Mrozek, Ireneusz, Yarmolik, Svetlana V.

Year:

2013

Language:

english

File:

PDF, 98 KB

english, 2013

46

[Lviv Polytechnic Nat. Univ International Conference on the Experience of Designing and Application of CAD Systems in Microelectronics - Slavske, Ukraine (18-22 Feb. 2003)] The Experience of Designing and Application of CAD Systems in Microelectronics, 2003. CADSM 2003. Proceedings of the 7th International Conference. - Automatic generation of symmetric transparent March memory tests

Zankovich, A.P., Yarmolik, V.N., Sokol, B.

Year:

2003

Language:

english

File:

PDF, 284 KB

english, 2003

47

[IEEE Comput. Soc Seventh Asian Test Symposium (ATS'98) - Singapore (2-4 Dec. 1998)] Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259) - March PS(23N) test for DRAM pattern-sensitive faults

Yarmolik, V., Klimets, Yu., Demidenko, S.

Year:

1998

Language:

english

File:

PDF, 407 KB

english, 1998

48

Address sequences

Yarmolik, V. N., Yarmolik, S. V.

Journal:

Automatic Control and Computer Sciences

Year:

2014

Language:

english

File:

PDF, 223 KB

english, 2014

49

[ACM Press the conference - Munich, Germany (1999..-..)] Proceedings of the conference on Design, automation and test in Europe - DATE '99 - Symmetric transparent BIST for RAMs

Hellebrand, S., Wunderlich, H.-J., Yarmolik, V. N.

Year:

1999

Language:

english

File:

PDF, 52 KB

english, 1999

50

[Telecommun. Res. Inst 14th International Conference on Microwaves, Radar and Wireless Communications. MIKON-2002 - Gdansk, Poland (20-22 May 2002)] 14th International Conference on Microwaves, Radar and Wireless Communications. MIKON - 2002. Conference Proceedings (IEEE Cat.No.02EX562) - Use Pollaczek polynomials for analysis characteristics of radar target identification system

Yarmolik, S.N., Shaliapin, S.V.

Year:

2002

Language:

english

File:

PDF, 244 KB

english, 2002